期刊文献+

片上网络关键技术及仿真方法研究 被引量:7

Key Technologies and Simulation Methodology for Network-on-Chip
原文传递
导出
摘要 片上网络(NoC)的研究借鉴了计算机网络的设计思想,将计算机网络技术移植到芯片设计中来。介绍了片上网络的关键技术和仿真方法,包括拓扑结构、路由与交换协议、流量控制、缓存设计、性能评估与仿真等,并对今后的研究做出了展望。 Research of Network-on-Chip uses for reference the idea of computer networks design,the computer networks technology is introduced into the chip design. In this paper,the key technologies and simulation methodology in NoC research is presented,including topology,routing and switching protocols,flow control,buffer design,performance evaluation and simulation etc.,and also the future research work is forecasted.
出处 《通信技术》 2009年第12期182-184,共3页 Communications Technology
关键词 片上网络 拓扑 协议 仿真 Network-on-Chip(NoC) topology protocol simulation
  • 相关文献

参考文献5

  • 1Bjerregaard T, Mahadevan S. A Survey of Research and Practices of Network-on-Chip[J]. ACM Computing Surveys, 2006, 38(01): 1-51.
  • 2张恒龙,顾华玺,王长山.片上网络拓扑结构的研究[J].中国集成电路,2007,16(11):42-46. 被引量:11
  • 3Vahdatpour A, Tavakoli A, Falaki M H. Hierarchical Graph: A New Cost Effective Architecture for Network on Chip[C]. Nagasaki, Japan: Embedded and ubiquitous computing, 2005, 3824: 311-320.
  • 4Sun Yi-Ran, Kumar S, Jantsch A. Simulation and Evaluation for A Network on Chip Architecture Using Ns-2[C]. Copenhagen, Denmark: 20th IEEE Norchip Conference, 2002.
  • 5Kumar S, Jantsch A, Soininen J P, et al. A Network on Chip Architecture and Design Methodology[C]. Pittsburgh, PA, USA: ISVLSI' 02, 2002: 117-124.

二级参考文献14

  • 1[1]Tobias Bjerregaard,Shankar Mahadevan,"A Survey of Research and Practices of Network-on-Chip",ACM Computing Surveys,Vol.38,Issue 1,2006.
  • 2[2]Partha Pratim Pande,Cristian Grecu,Michael Jones,Andre Ivanov,Resve Saleh,"Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures",IEEE Transactions on Computers,vol.54,pp.1024-1040,August,2005.
  • 3[3]S.Kumar et al.,"A Network on Chip Architecture and Design Methodology",Proc.Int'l Symp.VLSI(ISVLSI),pp.117-124,2002.
  • 4[4]W.J.Dally and B.Towles,"Route Packets,Not Wires:On-Chip Interconnection Networks",Proc.Design Automation Conf.(DAC),pp.683-689,2001.
  • 5[5]W.J.Dally and C.L.Seitz,"The Torus Routing Chip",Technical Report 5208:TR:86,Computer Science Dept.,California Inst.Of Technology,pp.1-19,1986.
  • 6[6]F.Karim et al.,"An Interconnect Architecture for Networking Systems on Chips",IEEE Micro,vol.22,no.5,pp.36-45,Oct.2002.
  • 7[7]Marcello Coppola,Riccardo Locatelli,Giuseppe Maruccia,Lorem Pieralisi and AlbertO Scanurra,"Spidergon:a novel on-chip communication network",System-on-Chip,2004.Proceedings.2004International Symposium on,pp.15-18,Nov.2004.
  • 8[8]P.Guerrier and A.Greiner,"A Generic Architecture for On-Chip Packet-Switched Interconnections",Design,Automation and Test in Europe Conference and Exhibition 2000.Proceedings,pp.250-256,March,2000.
  • 9[9]P.P.Pande,C.Grecu,A.Ivanov and R.Saleh,"Design of a Switch for Network on Chip Applications".Proc.Int'l Symp.Circuits and Systems(ISCAS),vol.5,pp.217-220,May,2003.
  • 10[10]M Saneei,A Afzali-Kusha,and Z Navabi,"Low-power and Low-latency Cluster Topology for Local Traffic NOCs",In Proceedings of 2005 IEEE International Symposium on Circuits and Systems,Island of Kos,Greece,vol.4 pp.1-5,May 2006.

共引文献10

同被引文献41

  • 1余昀.无人机数据链协议研究[J].舰船电子工程,2008,28(9):50-54. 被引量:8
  • 2张富彬,何庆延,彭思龙.调整门和连线尺寸以减小串扰的拉格朗日松弛法[J].计算机工程与科学,2007,29(5):73-76. 被引量:2
  • 3付方发,张庆利,王进祥,喻明艳,孙玉峰.支持多种流量分布的片上网络性能评估技术研究[J].哈尔滨工业大学学报,2007,39(5):830-834. 被引量:8
  • 4LUO Feng-guang, CAO Ming-cui,ZHOU Xin-jun,et al. 3-D optical interconnect Mesh network for on-board parallel multiprocessor system based on EOPCB [ J]. SPIE ,2007 ( 1-3 ) :7954-7954.
  • 5FENG Yong-hua, LUO Feng-guang, YUAN Jing. Chip network based on electro-optical printed circuit board. Journal of Huazhong University of Science and Technology [ J]. Natural Science Edition, 2007,135 (3) :5-7.
  • 6Steenberge G V, Geerinck P Put, Koetsem, S Vet aL MT-compatible laser-ablated interconnections for optical printed circuit boards [ J]. Llightwave Technol, 2004,22 ( 9 ) : 2083 -2090.
  • 7Schneider M, Ktihner T. Coupling elements for optical printed circuit boards with precision molded alignment structures [ J ]. IEEE 2008 Electronic Components and Technology Conference, 2008,19 ( 6 ) : 276-282.
  • 8SHEN Li-cheng, LO Wei-chung, CHANG Hsiang-hung, et al. Characterization of organic muhi-mode optical waveguides for electrooptical printed circuit boards [ J ]. Circuit World, 2006,132 ( 6 ) : 8-15.
  • 9杨智峰.NoC体系结构性能评估及通讯元件设计[D].西安:西北大学,2009.
  • 10Hoi-Jun Yoo, Kangmin Lee, Jun Kyoung Kim. Low-PowerNOC for High-Performance SOC Design[M]. Taylor Fran-cis Group Publishers, LLC,2008:134-138,168-183.

引证文献7

二级引证文献6

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部