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基于SoCLib的异构多核结构的设计与实现

Design and Implementation of a Heterogeneous Multi-core Architecture Based on SoCLib
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摘要 本文提出了一种针对高性能运算的异构多核结构设计方案。该方案整合了四个DSP和一个通用处理核,核间共享存储器。另外本文还给出了该结构在SoCLib仿真平台上的实现方案,并将离散余弦变换程序在该结构上的运行数据和同构多核上的运行数据相比较,验证了该方案的高效性和正确性。 This paper is to propose a design solution for heterogeneous multi-core architecture according to a kind of high-performance computing. This heterogeneous multi-core architecture integrates a general-propose processor and four DSPs, share memory between the cores. Besides, it also shows the implementation of this architecture on SoCLib platform and compares the data gained by running DCT on the structure to those gained on homogeneous structure, to validate the correctness and high-effectiveness of our solution.
作者 高文 付宇卓
出处 《微计算机信息》 2009年第32期117-119,共3页 Control & Automation
基金 基金申请人:付宇卓 项目名称:基于移动多媒体应用的多核处理器关键性结构及其可测性技术研究 基金颁发部门:上海市科学技术委员会(06SA16)
关键词 SOC SoCLib SYSTEMC 异构多核 SoC SoCLib SystemC heterogeneous multi-core
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参考文献4

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二级参考文献4

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