I^2C接口控制器的设计及FPGA验证系统构建

Design of I^2C Serial Bus Controller and FPGA Verification System

分析了I2C串行总线的数据传输机制;用VerilogHDL设计了随机读写模式串行总线控制器;在ModelSim6.2中进行了功能仿真;在XilinxISE9.1i集成开发环境中进行了综合、适配和FPGA器件下载调试;搭建外围电路对系统进行分析测试;并用Agilent16823A逻辑分析仪采集数据进行验证;结果表明该电路实现了I2C串行总线协议的要求。

This paper analyzed the data transmitting mechanism of I2C serial bus.And the interface controller of I2C serial bus is designed with VerilogHDL.The design is s.imulated in ModelSim6.2 tools,and synthesized,implemented,downloaded to a proper FPGA device in Xilinx ISE 9.1 i.Then the system is tested via constructing peripheral circuits and the Agilent 16823A logical analyzer is applied to acquire data to verify the design.Finally,the results demonstrate that it realizes the data transmission/receive function and meets the demand of serial bus protocol of I2C.