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一种CMOS串联集成稳压器的设计与分析

Design and Analysis of a CMOS Series Integrated Voltage Regulator
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摘要 设计了一种CMOS集成串联稳压器,由带隙基准源、误差放大器和分电压元件等组成。内部带隙基准源电路采用带有启动电路和PATA电流的设计。仿真结果表明输出电压为2.5V,当电流从1uA到100mA变化时,输出电压能稳定在2.5V,输出纹波小于120mV,瞬态工作电流100uA,且具有较强的电流驱动能力。 An IP core of CMOS series voltage regulator is designed in this paper, which consists of band gap reference, error amplifier and voltage divider. Its interior band gap reference circuit is designed with a start circuit and PATA current. The simulation results show that the output voltage of the regulator is 2.5V. It can supply steady 2.5V with the current from luA to 100mA. Output ripple is smaller than 120mv,action mode quiescent current is 100uA, and it has a strong current driving capability.
作者 裴晓敏
出处 《电脑与电信》 2009年第10期43-45,共3页 Computer & Telecommunication
关键词 稳压器 带隙基准源 误差放大器 反馈 voltage regulator bandgap reference error amplifier feedback
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