FPRM逻辑电路最佳极性的启发式搜索

Best polarity searching of FPRM circuits with heuristic technique

本文将启发式思想引入中规模及以上规模逻辑电路的极性优化过程,提出最少操作遍历方法用于求解当前待评估极性集合的最佳遍历顺序,以达到加快电路极性优化速度的目的。将该方法融入遗传算法中,以电路面积最小化为目标,对12个MCNC Benchmark电路进行测试。结果表明,对变量数目多、结构复杂的电路,该方法的最佳极性搜索效率尤为明显。

By introducing heuristic idea into polarity optimization of fixed polarity RM（FPRM） logic circuits, especially for MSI and LSI, the least operation traversal method is proposed for the least operation traversal consequence of the current polarities waiting for evaluation, and thus to speed up the polarity optimization. With circuit area minimization as the objective function, the proposed method is embodied in a genetic algorithm and tested by 12 MCNC Benchmark circuits. The results indicate that the method is effective especially for the circuits with comolicated structure or more input variables.