宽带低相噪CMOS LC VCO的设计

Design of a Wideband and Low Phase Noise CMOS LC VCO

设计了一款宽带CMOSLCVCO,在分析VCO相位噪声来源的基础上,对VCO进行了结构优化和噪声滤除,并采用了开关电容阵列以增加带宽。电路采用0.18μmCMOS射频工艺进行流片验证,芯片面积为0.4mm×1mm。测试结果显示:芯片的工作频率为3.34～4.17GHz,中心频率为4.02GHz时输出功率是-9.11dBm,相位噪声为-120dBc/Hz@1MHz,在1.8V工作电压下的功耗为10mW。

A wideband CMOS LC VCO is designed. Based on the analysis of the sources of the VCO phase noise, the structure of VCO is optimized and the technique of noise filtering is used, the switching capacitance arrays are exploited to expand the bandwidth. The VCO is fabri- cated in 0. 18 μm CMOS RF process, the chip area is 0. 4 mm×1 mm. Measurements show： the operating frequency covers 3.34-4.17 GHz, when the central frequency is 4.02 GHz, the phase noise is --120 dBc/Hz at 1 MHz offset while dissipating 10 mW from 1.8 V supply.