RS-CC的级联编码设计及其嵌入式FPGA实现

Design of error-correcting code based on RS-CC and its embedded implementation over FPGA

分析了802.16e无线通信系统,针对设计过程中经常出现的数据信息不同步问题,提出了一种基于RS(64,48,8)+CC(2,1,7)+交织的级联编码设计方案。该方案利用功能模块化的设计理念,达到了在不增加译码复杂度的情况下实现有效而可靠的通信。通过将各级编解码模块化,利用FPGA技术实现了整个级联纠错编译码系统。实验结果表明,模块化的FPGA嵌入式设计不仅提高了系统的稳定性,还大大缩短了开发周期。

To solve the problem of out-of-synchronism in data communication which always appeared in design procedure, the wireless communication system based on 802.16e are analyzed, and a kind of coding scheme by using concatenated Reed-Solomon-Convolutional code is designed, the coding sequence is：RS, CC, interleave.This design implement reliable and valid communication without increasing the complexity of encoding by using modularization.The process is to respectively modularize RS, CC, interleave firstly, then synchronize all modulates and implement the entire error-correcting system in FPGA technology.Results suggest that this scheme not only strengthen the stability of error-correcting system, but also shorten the development period.