DTMB标准实时LDPC编码器设计

Real-time LDPC Encoder Design for DTMB

在中国数字电视广播地面传输标准(DTMB)中,使用了非规则准循环LDPC码(QC-LDPC)作为前向纠错编码的核心部分。针对该LDPC码生成矩阵的子块特点,设计了一种基于线性反馈移位寄存器结构的LDPC编码器,在45MHz的工作频率下即可实现DTMB中3种不同码率下的LDPC实时编码,整个设计在Altera公司的EP2S15器件上完成了布局布线,与同类设计方案相比较,减少了约20%的逻辑资源,适合于低复杂度DTMB标准发射机开发。

In Chinese national standard for Digital Terrestrial Multimedia Broadcasting （DTMB）, irregular Quasi Cyclic LDPC （QC- LDPC） code is used as core part of forward error correction coding. In this paper, according to LDPC generation matrix distribution property of DTMB, based on linear feedback shifting register architecture, a real-time LDPC encoder is presented, which can complete three different LDPC encodings of DTMB. The whole design is implemented on EP2S15 FPGA chip of Ahera. Compared with existing architecture, this novel strategy can reduce hardware resources by about 20%, while it can still meet the performance requirement of DTMB. This architecture is much suitable for low-cost DTMB receiver design.