主从可配置I2C总线接口IP及其应用

Master/Slave Configurable I2C Bus Interface IP and its Applications

介绍了一种主从可配置I2C总线控制器IP核的硬件结构,在此基础上,着重论述了该I2C总线控制器IP在基于FPGA的Nios Ⅱ嵌入式系统中的应用方法,构建了一个包含主、从I2C总线控制器IP的可编程片上系统,在该系统上对多种电子器件进行了I2C总线传输测试,给出了应用实例。实验表明,该IP具有工作可靠、配置灵活和使用简便的特点。

Hardware architecture of an I2C bus interface IP core with master/slave configurability is described, and then application process of the I2C bus controller IP in FPGA - based Nios Ⅱ embedded system is emphatically discussed. Finally, a system - on - programmable - chip （ SOPC ） including a master I2C IP and a slave I2C IP is built up,with which I2C bus transmission tests for multiple electronic devices are made, and an example is given. The experiments show that the IP core is reliable, flexible in configu- rability and easy to use.