ARINC659总线协议芯片的仿真验证

Implementation of ARINC 659 Bus Interface Chip Verification Platform

在现代集成电路设计中,对芯片的仿真验证是芯片设计验证的关键环节之一,一定程度上决定流片的成败。为了搭建一种可靠的芯片验证的虚拟平台,首先分析了ARINC659总线协议的特点,在此基础上结合ARINC659总线协议芯片设计中基于虚拟验证平台的仿真验证项目实践,重点研究了该芯片设计虚拟验证平台的一种构建实现方法和仿真验证。该验证方法提高了验证效率,缩短了整个设计验证周期,为芯片的成功投片提供了可靠的保证。

The verification of chip is the key process of taping out successfully,in modern integrate circuit design.For set up the verification platform of the chip,first of all,analyses the character of ARINC659 bus protocol.Basing on this,it link the simulation on dummy verification platform of ARINC659 chip item,and research a way of ARINC659 bus interface chip to implement verification platform and simulation of the chip principally.The result shows that testbench constructed in this way improves verification productivity, shortens the whole design process, and provides eredible guarantee for taping out successfully of the chip.