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一款0.18μm CMOS辐射加固差分压控振荡器 被引量：3

A Radiation-hardened-by-design Differential Voltage-controlled Oscillator Implemented in 0.18μm CMOS Process
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摘要 基于对称负载压控振荡器(VCO)的单粒子瞬变(SET)失效机理,应用设计加固(RHBD)技术分别改进了偏置电路和环形振荡器,设计和实现了一款0.18μm CMOS辐射加固差分VCO。模拟结果表明:加固VCO的SET敏感性大幅降低,同时还降低了抖动对于电源噪声的敏感性。虽然电路结构变化会导致频率下降,但可以通过调整电路尺寸而解决。此外,加固VCO面积开销有所降低,优于其他加固方法。 Applying the radiation-hardened-by-design （RHBD） technique to improve the bias generator and the ring oscillator of the differential voltage-controlled oscillator （VCO） with symmetrical loads, a single-event transient （SET） hardened VCO was designed and implemented in 0.18μm CMOS process based on the failure mechanisms. Simulation results indicate that the single-event susceptibility of the VCO is significantly reduced. Simultaneously, it also reduces the jitter sensitivity to supply noise. This new VCO topology results in a decrease in the frequency, but it can be figured out by adjusting the sizes of the delay buffer. Furthermore, the radiation hardened VCO leads to a decreased area requirement.
作者 赵振宇 郭斌 张民选 刘衡竹
机构地区 国防科技大学计算机学院
出处 《国防科技大学学报》 EI CAS CSCD 北大核心 2009年第6期12-17,共6页 Journal of National University of Defense Technology
基金 国家自然科学基金资助项目(60836004 60676010 60876024) 教育部博士点基金资助项目(20079998015) 教育部"高性能微处理器技术"创新团队资助项目(IRT0614)
关键词 单粒子效应 单粒子瞬变 压控振荡器 RHBD single-event effects single-event transients voltage-controlled oscillators RHBD（Radiation-hardened-by-design）
分类号 TN386.1 [电子电信—物理电子学]
  • 相关文献

参考文献8

  • 1Chen W J, et al. Impact of VCO Topology on SET Induced Frequency Response[J]. IEEE Transactions on Nuclear Science, 2007, 54(6) : 2500 - 2505.
  • 2Chen W J, et al. Investigation of Single-event Transients in Voltage-controlled Oscillators[J]. IEEE Transactions on Nuclear Science, 2003, 50 (6) : 2081 - 2087.
  • 3Boulghassoul Y, et al. Effects of Technology Scaling on the SET Sensitivity of RF CMOS Voltage-controUed Oscillators[J]. IEEE Transactions on Nuclear Science, 2005,52(6) :2426 - 2432.
  • 4Loveless T D, et al. Modeling and Mitigating Single-event Transients in Voltage-controlled Oscillators[J]. IEEE Transactions on Nuclear Science, 2007, 54(6) : 2561 - 2567.
  • 5Loveless T D, et al. A Probabilistic Analysis/Technique Applied to a Radiation-hardened-by-design Voltage-controlled Oscillator for Mixed-signal Phase-locked Loops[J]. IEEE Transactions on Nuclear Science, 2008, 55(6) : 3447 - 3455.
  • 6赵振宇,蒋仁杰,张民选,胡军,李少青.差分压控振荡器中单粒子瞬变的研究[J].国防科技大学学报,2009,31(2):81-85. 被引量：5
  • 7Maneatis J G. Low-jitter Process-independent DLL and PLL Based on Self-biased Techniques[J]. IEEE Journal of Solid-state Circuits, 1996, 31 (11) : 1723 - 1732.
  • 8Maneatis J G, et al. Serf-biased High-bandwidth Low-jitter 1-to-4096 Multiplier Clock Generator PLL[J]. IEEE Journal of Solid-state Circuits, 2003,38(11) : 1795 - 1803.

二级参考文献8

  • 1Koga R, et al. Observation of Single Event Upsets in Analog Microcirenits[J]. IEEE Transactions on Nuclear Science, 1993,40(6) : 1838 - 1844.
  • 2Boulghassoul Y, et al. Effects of Technology Scaling on the SET Sensitivity of RF CMOS Voltage-controlled Oscillators[J]. IEEE Transactions on Nuclear Science, 2005, 52(6): 2426-2432.
  • 3Loveless T D, et al. A Hardened-by-design Technique for RF Digital Phase-locked Lonps[J]. IEEE Transactions on Nudesr Science, 2006, 53(6) : 3432 - 3438.
  • 4Wenjian C, et al. Impact of VCO Topology on SET Induced Frequency Response[J]. IEEE Transitions an Nuclear Science, 2007, 54(6): 2500-2505.
  • 5Wenjian C, et al. Investigation of Single-event Transients in Voltage-controlled Oscillators[J]. IEEE Transactions on Nuclear Science, 2003, 50 (6) : 2081 - 2087.
  • 6Loveless T D, et al. Modeling and Mitigating Single-event Transients in Voltage-controlled Oscillators[J]. IEEE Transactions on Nuclear Science, 2007, 54(6) : 2561 - 2567.
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  • 8Maneatis J G. Low-Jitter Process-independent DLL and PLL Based on Self-biased Techniques[J]. IEEE Journal of Solid-state Circuits, 1996, 31 (11): 1723 - 1732.

共引文献4

同被引文献16

  • 1Shao Y L, Wang Y, Ning Z H, et al. Analysis and design of high power supply rejection LDO [ C ]//8th IEEE International Conference on ASIC, ASICON 2009, October 20 - 23, 2009,.
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  • 4Sun L Z, Kwasniewsk T A, A 1.25GHz 0.35μm monolithic CMOS PLL based on a multiphase ring oscillator[J]. Solid-State Circuits, IEEE Journal, 2001,36(6): 910-916.
  • 5Sun L Z, Kwasniewsk T A. A quadrature output voltage controlled ring oscillator based on three-stage sub-feedback loops [ C ]// Circuits and Systems, 1999. ISCAS'99. Proceedings of the 1999 IEEE International Symposium on, 1999,172:176 - 179.
  • 6Hung T B, Yvon S. Design of a high-speed differential frequency-to-voltage converter and its application in a 5GHz frequency-locked loop[ J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2008, 55 (3) : 766 - 774.
  • 7Lam Y H, Ki W H. A 0.9v 0.35m adaptively biased CMOS IDO regulator with fast transient response [ J]// Proceedings of 2008 IEEE International Solid State Circuits Conference, ISSCC, Feb 3 -7 2008, San Francisco, CA, United States, 2008 : 442 -443.
  • 8Chen H, Leung K N, A fast-transient LDO based on buffered flipped voltage follower [ C ]// Electron Devices and Solid- State Circuits ( EDSSC ), 2010 IEEE International Conference, 2010:1 -4.
  • 9Mohaned E N, Ahmed A. A 25mA 0. 131.Lm CMOS LDO regulator with power-supply rejection better than -56dB up to 10MHz using a feedforward tipple-cancellation technique [ C ]// IEEE International Solid-State Circuits Conference. ISSCC 2009. 2009 : 330 -331,331a.
  • 10Xu G, Jiang J G, Wang J K. A wide range high power supply rejection ratio and transient enhanced low drop-out regulator [ C ]//6th International Conference on Wireless Communications Networking and Mobile Computing (WiCOM), 2010:1 -4.

引证文献3

二级引证文献3

国防科技大学学报
2009年 第6期

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