一种基于数据流的抗干扰视频解码和显示方法

An Anti-jamming Video Data Decoding and Display Method Based on Data Flow

一般在基于SAA7113H和FPGA的视频数据采集和显示系统设计中,由于把RTC0和RTC1引脚通过I2C总线设置为输出行场参考信号,使得采集和显示部分各自使用自己的时钟脉冲信号,当涉及到视频切换时就会出现视频采集和显示不能同步的现象[2]。文中介绍了一种基于数据流的抗干扰视频数据解码和显示方法,利用视频数据的解码有效解决了视频切换时采集和显示不同步的问题,而且可以省略RTC0和RTC1引脚,有效节省了FPGA芯片的I/O资源,可进一步提高系统的集成度。

In the system design of the video data acquisition and display system based on SAA7113H and FPGA, the acquisition and display part use their own clock signal, because the RTC0 and RTC1 pins are set to be output signal of line and field by the I2C bus, so the video capture and display can not be synchronized as the video, is switched. In this paper, an anti-jamming video data decoding and disply method based on data flow was introduced. It effectively solves the problem of the video capture and display can not be synchronized as the video is switched. The RTC1 pin RTC0 pins can be omitted and the I/O resources of the FPGA effectively saved. It can also improve the integration of the system.