期刊文献+

基于SS序列集成电路不规则模块布图算法

The irregular shape unit floorplan design based on single-sequence
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摘要 针对Single-Sequence的集成电路布图,在SS编解码应用对芯片中各单元的摆放进行优化,从而达到芯片面积利用率最大化。重点介绍了利用SS序列解决不规则模块摆放问题,使得SS布图功能更灵活多变。 Single-sequence is a technology used to design a better idea to put the module so that the chip can get a smaller area. This article focuses on the SS in the sequence generated map of the irregular shape unit.
作者 徐敏 刘陈
出处 《微型机与应用》 2010年第3期62-63,66,共3页 Microcomputer & Its Applications
关键词 Single—Sequence 水平/垂直约束图 ABLR关系 single-sequence level/vertical constraint graph ABLR
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参考文献3

  • 1KAJITANI Y. The Single-Sequence that unifies placement and floorplanning [M]. Presented at the Presession Meeting of ASP-DAC. Asian Semi-conductor University Cooperations, 2003.
  • 2KIRKPATRICK S. Optimization by simulated annealing[J]. Science, 1984,34(5):975-986.
  • 3ZHANG X, KAJITANI Y. Theory of T-junction floorplan in terms of single-sequence [J]. IEEE Int. Symp. on Circuits and Systems, 2004:341-344.

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