摘要
针对数字通信系统中底层协议栈开发过程中处理数据量大,出现问题不易再现、难于追踪的问题,设计了一种专门用于底层协议栈开发的高速数据采集、仿真系统。系统采用USB总线作为高速数据通路,使用FPGA进行格式转换及数据缓冲。论述了仿真系统的工作原理和系统框架,分析了数据转换、解析的流程,给出了系统仿真的一般模式。
A data acquisition and simulation system is developed for underlying protocol stack development to overcome the shortcomings such as large data quantity, difficult to reproduce and recover in the procedure of underlying protocol stack developing of digital communication systems. USB is adopted as the high speed data channel for the data acquisition system. FPGA is used for format converting and data buffering. The principle and framework of the simulation system is expounded. The procedure of :data conversion and resolution are analyzed. A common pattern of the simulation system is shown.
出处
《电子技术应用》
北大核心
2010年第2期129-132,共4页
Application of Electronic Technique