摘要
针对多核处理器计算能力和访存速度间差异不断增大对多核系统性能提升的制约问题,分析几款典型多核处理器存储系统的设计特点,探讨多核处理器片上存储系统发展的关键技术,包括延迟造成的非一致cache访问、核与cache互连形式对访存性能的束缚以及片上cache设计的复杂化等。
Aiming at the problem that memory system on chip becomes a bottleneck of improving the performance of multi-core processor as the speed distinction between CPU and memory increases. This paper analyses the design characters of memory system in multi-core processor, such as Non-Uniform Cache Access(NUCA) caused by delay, constraint to access performance of connection between core and cache, and complexity of on-chip cache design.
出处
《计算机工程》
CAS
CSCD
北大核心
2010年第4期4-6,共3页
Computer Engineering
基金
国家自然科学基金资助项目(60873016)
国家"863"计划基金资助项目(2008AA01Z147
2007AA01Z102)