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基于弱反型的宽工作电压OTA研究设计 被引量：1

Wide Power Supply OTA for Design is Based on Weak Inversion
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摘要 分析与设计了一种工作电源在0.6 V^3.3 V之间、超低功耗的跨导运算放大器(OTA)。整体电路基于工作在弱反型区的衬底驱动输入差分对和电平移位电路,且供电电压可低于晶体管PMOS的阈值电压。OTA电路采用HJTC 0.35μm N阱CMOS工艺,Hspice仿真结果表明,在工作电压为0.6 V时,功耗仅为326 nW。 An ultra low power operational transconductance amplifier （OTA） is analyzed and designed by a power supply of 0. 6 V - 3.3 V. The proposed circuit is based on bulk-driven differential pair and DC level shifters working in weak inversion, the power supply can be lower than the threshold voltage of the PMOS- FET. The OTA circuit has been simulated by Hspice with HJTC 0. 35μm N-well CMOS technology. The simulation result shows that,at the supply voltage of 0. 6 V,the power consumption is 326 nW.
作者 李亮 陈珍海
机构地区 苏州市职业大学电子系 中国电子科技集团公司第
出处 《中国电子科学研究院学报》 2010年第1期32-35,共4页 Journal of China Academy of Electronics and Information Technology
关键词 弱反型层 衬底驱动差分对 超低电压 跨导运算放大器(OTA) weak inversion bulk-driven differential pair ultra-low-voltage operational transconductance amplifier （OTA）
分类号 TN431 [电子电信—微电子学与固体电子学]
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参考文献8

  • 1杨银堂,李晓娟,朱樟明,韩茹.低压低功耗运算放大器结构设计技术[J].电路与系统学报,2005,10(4):95-101. 被引量：6
  • 2CARRILLO, TORELLI J M, PEREZ-ALOE G, et al. F. 1-V Rail-to-rail Bulk-driven CMOS OTA with Enhanced Gain and Gain-bandwidth Product [ J ]. Circuit Theory and Design, 2005, C28(1) : 261-264.
  • 3DAVID J. Using the Weak Inversion Region to OptimizeInput Stage Design of CMOS Op Amps [ J]. IEEE Transactions on Circuits and Systems,2004, 51 (1) :8-14.
  • 4邹志革,邹雪城,黄峰.低压低功耗模拟集成电路设计技术及展望[J].微电子学,2006,36(1):60-65. 被引量：9
  • 5PAUL R, GRAY. Analysis and Design of Analog Integrated Circuits [ M ]. Beijing : Higher Education Press, 2005.
  • 6LUIS H C, et al. An Ultra-Low-Voltage Ultra-Low-Power CMOS Miller OTA with Rail-to-Rail Input_Output Swing [ J]. IEEE Transactions on Circuits and Systems, 2007, 54, (10) :843-847.
  • 7PHILLIP E, ALLEN DOUGLAS R, HOLBERG. CMOS Analog Circuit Design Second Edition[ M]. Beijing: Publishing House of Electronics Industry,2005.
  • 8WILLY M C, SANSEN. Analog Design Essentials [ M ]. Berlin : Springer, 2006.

二级参考文献37

  • 1刘忠立.SOICMOS模拟集成电路发展概述[J].微电子学,2004,34(4):384-389. 被引量：1
  • 2严晓浪,吴晓波.低压低功耗模拟集成电路的发展[J].微电子学,2004,34(4):371-376. 被引量：10
  • 3Yeo K-S,Rofail S S.低压低功耗CMOS/BiCMOS超大规模集成电路[M].周元兴,张志龙.北京:电子工业出版社,2003.2-7.
  • 4Enz C C,Vittoz E.CMOS low-power analog circuit cesign[A].in:Cavin R,Liu W.ed.Symp Circuits & Systems[C].IEEE Service Center,Piscataway.79-133.
  • 5Steyaert M,Peluso V,Bastos J,et al.Custom analog low power design:the problem of low voltage and mismatch[A].IEEE Custom Integrated Circuits Conf[C].Santa Clara,USA.1997.285-292.
  • 6Vittoz E A.Low power design:ways to approach the limits[A].41st Int Symp Sol Sta Circ Conf[C].San Francisco,CA.1994.14-18.
  • 7Vittoz E,Fellratb J.CMOS analog integrated circuits based on weak inversion operation[J].IEEE J Sol Sta Circ,1977,12(3):224-231.
  • 8Pimentel J,Salazar F,Gavriel M P Y.Very-low power analog cells in CMOS[A].43rd IEEE Midwest Symp Circ and Syst[C].Lansing,MI.2000.328-331.
  • 9Allen P E,Blalock B J,Rincon G A.Low-voltage analog circuits using standard CMOS technology[A].Proc 1995 IEEE Int Symp Low Power Design[C].Dana Point,California,USA.1995.209-214.
  • 10Galup-Montoro C,Schneider M C,Loss I J B.Series-parallel association of FET's for high gain and high frequency applications[J].IEEE J Sol Sta Circ,1994,29(9):1094-1101.

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中国电子科学研究院学报
2010年 第1期

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