基于FPGA的三端口非透明型SDRAM控制器

Three Ports and Non-Transparent SDRAM Controller Based On FPGA

本文采用Altera公司的Stratix系列FPGA实现了一个三端口非透明型SDRAM控制器,该控制器面向用户具有多个端口,通过轮换优先级的设计保证了多个端口平均分配SDRAM的带宽且不会降低传输速率。将访问SDRAM空间虚拟成一个简单的访问三口RAM的操作,采用乒乓的DMA传输机制大大提高了数据传输的带宽和效率。

A three ports and non-transparent SDRAM controller is designed and implemented using Ahera＇s FPGA of Stratix series in this paper, this controller has multi-ports for users. The design method of ＂priority in turns＂ ensures the multi-ports can averagely use the bandwidth of SDRAM without decreasing the transfer speed. It makes accessing SDRAM space as if accessing a simple three ports RAM, the ping-pong DMA transfer method greatly increase transfer bandwidth and efficiency.