前向MLP网络的FPGA实现

FPGA Implementation of Feed-Forward MLP Neural Networks

分别采用CORDIC(Coordinate rotation digital computer)算法和分布式算法实现多层感知器网络的传输函数计算和输入与权重乘积和计算,通过模块复用的方法构造了一个用于函数逼近的、无需乘法器的神经网络,并在Nois开发平台上测试了该网络的性能。该网络每17个时钟周期输出一个数据,占用FPGA的7781个LE(Logic element)和8976 bit存储器,具有良好的扩展性。

The transfer function and the multiple-add calculation of MLP （multilayer perceptron） neural networks are implemented by using the CORDIC（coordinate rotation digital computer） algorithm and the distributed algorithm. A MLP neural network for function ap- proximation without the required multipliers is constructed through module reuses. The performance of the neural networks is tested on the NoisⅡ platform. Results show that the network using 7781 LEs and 8976 bit memory of the FPGA has an output rate of 17 clocks per data and good expansibility.