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System Architecture of Godson-3 Multi-Core Processors 被引量：7

System Architecture of Godson-3 Multi-Core Processors
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摘要 Godson-3 is the latest generation of Godson microprocessor family. It takes a scalable multi-core architecture with hardware support for accelerating applications including X86 emulation and signal processing. This paper introduces the system architecture of Godson-3 from various aspects including system scalability, organization of memory hierarchy, network-on-chip, inter-chip connection and I/O subsystem. Godson-3 is the latest generation of Godson microprocessor family. It takes a scalable multi-core architecture with hardware support for accelerating applications including X86 emulation and signal processing. This paper introduces the system architecture of Godson-3 from various aspects including system scalability, organization of memory hierarchy, network-on-chip, inter-chip connection and I/O subsystem.
作者 高翔 陈云霁 王焕东 唐丹 胡伟武
机构地区 Institute of Computing Technology Graduate University of Chinese Academy of Sciences
出处 《Journal of Computer Science & Technology》 SCIE EI CSCD 2010年第2期181-191,共11页 计算机科学技术学报（英文版）
基金 Supported by the National High Technology Development 863 Program of China under Grant No.2008AA010901 the National Natural Science Foundation of China under Grant Nos.60736012 and 60673146 the National Basic Research 973 Program of China under Grant No.2005CB321601.
关键词 multi-core processor scalable interconnection cache coherent non-uniform memory access/non-uniform cache access （CC-NUMA/NUCA） MESH CROSSBAR cache coherence reliability availability and serviceability （RAS） multi-core processor, scalable interconnection, cache coherent non-uniform memory access/non-uniform cache access （CC-NUMA/NUCA）, MESH, crossbar, cache coherence, reliability, availability and serviceability （RAS）
分类号 TP332 [自动化与计算机技术—计算机系统结构] TU855 [建筑科学]
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二级参考文献9

  • 1Wei-WuHu Fu-XinZhang Zu-SongLi.Microarchitecture of the Godson-2 Processor[J].Journal of Computer Science & Technology,2005,20(2):243-249. 被引量：52
  • 2Hu W, Wang J, Gao X, et al. Micro-architecture of Godson 3 multi-core processor [EB/OL]//Proc of the 20th Hot Chips. 2008 [ 2008-11-20]. http://www. hotehips. org/he20/main page. htm.
  • 3HyperTransport Technology Consortium. HyperTransport ^TMI/O I.ink Specification Revision 1. 03[M/OL]. 2001 [2008-11- 20]. http://www. hypertransprot. org/default. elm? page = HyperTransportSpecifieationslx.
  • 4ARM. AMBA AXI Protocol vl. 0 Specification [M/OL]. 2004[2007-05-10]. http://www. arm. com/products/solutions/ axi_spec. html.
  • 5Lamport L. Time, clocks, and the ordering of events in a distributed system [J]. Cornmunnieations of the ACM, 1978, 21(7): 558-565.
  • 6Gharachorloo K, Lenoski D, Laudon J, et al. Memory consistency and event ordering in scalable shared-memory multi processors [C] //Proc of the 17th Int Syrup on Computer Architecture (ISCA'90), Los Alamitos: IEEE Computer SOciety, 1990: 28-31.
  • 7Culler D, Singh J, Gupta A. Parallel Computer Architecture [M]. San Francisco: Morgan Kaufmann, 1996.
  • 8胡伟武,water.chpc.ict.ac.cn,施巍松,water.chpc.ict.ac.cn,唐志敏,water.chpc.ict.ac.cn.A Framework of Memory Consistency Models[J].Journal of Computer Science & Technology,1998,13(2):110-124. 被引量：1
  • 9胡伟武,唐志敏.龙芯1号处理器结构设计[J].计算机学报,2003,26(4):385-396. 被引量：53

共引文献80

同被引文献70

  • 1孟小甫,高翔,从明,张爽爽.龙芯3A多核处理器系统级性能优化与分析[J].计算机研究与发展,2012,49(S1):137-142. 被引量：12
  • 2胡伟武,张福新,李祖松.龙芯2号处理器设计和性能分析[J].计算机研究与发展,2006,43(6):959-966. 被引量：37
  • 3伍鸣,张福新,林伟,许先超,袁楠,王剑.龙芯2号处理器系统优化关键技术[J].计算机研究与发展,2006,43(6):980-986. 被引量：3
  • 4HU Weiwu, WANG Jian, GAOXiang, et al, GODSN-3: A scalable multicore RISC processor with x86 emulation [J]. IEEE Micro, 2009, 29 (2): 17-29.
  • 5Jair Fajardo Junior, Mateus B Rutzig, Antonio CS Beck, el al. Towards an adaptable Multiple-ISA reconfigurable procesr[G] Lecture Notes in Computer Science 6578 7th International Symlyo- siurn on Applied Recont'igurable Computing, 2011: 157-168.
  • 6Lawton K. Bochs: The open source IA-32 emulation project [EB/OL]. http: //bochs. sourceforge, net/, 2011.
  • 7Fan DR, Li XW, Li GJ, et al. New methodologies for parallel architecture [J]. Journal of Computer .Science and Technolo- gy, 2011, 26 (4): 578-587.
  • 8胡伟武,李晓钰,李国杰.一种RISC处理器及其寄存器标志位处理方法[P].中国:200710308571.1,2008.
  • 9Linux 3. 1. Release log [EB/OL]. [2011-10-24]. http: // kernelnewbies, org/Linux _ 3. 1.
  • 10OEMU. Change Log/1.2 [EB/OL]. [2012-09-05]. http: // wiki. qemu. org/ChangeLog/1.2.

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Journal of Computer Science & Technology
2010年 第2期

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