期刊文献+

真实硬件环境下幂剩余功耗轨迹指数信息提取 被引量:13

Exponential information's extraction from power traces of modulo exponentiation implemented on FPGA
下载PDF
导出
摘要 为获取真实硬件上实现的公钥密码密钥信息,提出了实用功耗分析模型,并归纳出指数信息提取的信息处理方法;利用自主设计实现的功耗分析平台获取了幂剩余算法功耗轨迹图,成功提取出其32bit指数信息;推翻了Messerges等关于使用SPA攻击难以在真实硬件环境下直接获取RSA密钥信息的论断;此外,还验证了静态掩盖算法抗SPA攻击的有效性。 A power analysis model on modulo exponentiation's computation suitable for real environment was presented in the basis of analysis to the great amount of power traces in the rough. And a method of signal processing for extracting exponential information from the initial power traces was inferred too. Hereby, a power analysis platform was designed and implemented. The exponential information submerged in power traces of 32bit modulo exponentiation algorithms applied in a FPGA chip was successfully extracted where after. Meanwhile, a conclusion about SPA attack on RSA made by Messerges et al, such as the problem with an SPA attack was that the information about the secret key was difficuJt to directly observe, was proved to be incorrect. Finally, the static masking algorithm for modulo exponentiation of anti-SPA attack was also validated in this testing platform.
出处 《通信学报》 EI CSCD 北大核心 2010年第2期17-21,共5页 Journal on Communications
基金 国家自然科学基金资助项目(60873216) 电子信息产业发展基金资助项目([2006]824 [2006]717) 四川省应用基础研究基金资助项目(2008JY0078) 四川省教育厅科研基金资助项目(2006C033) 成都市"十一五"重大科技基金资助项目([2009]33) 成都信息工程学院校选科研基金资助项目(CRF200708)~~
关键词 密码学 幂剩余 功耗分析攻击 简单功耗分析攻击 cryptography modulo exponentiation power analysis simple power analysis
  • 相关文献

参考文献12

  • 1KOCHER E Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems[A]. Proceedings of Advances in Cryptology-CRYPTO'96[C]. 1996. 104-113.
  • 2DHEM J F, KOEUME F, LEROUX P A, et al. A practical implementation of the timing attack[A]. Proceedings of CARDIS 1998[C]. 1998.14-16.
  • 3MESSERGES T S, DABBISH E A, SLOAN R H. Investigations of power analysis attacks on smart cards[A]. Proc USENIX Workshop Smartcard Technology[C]. Chicago, Illinois ,USA, 1999. 151-161.
  • 4KOCHER P, JAFFE J, JUN B. Differential power analysis[A]. Proceedings of Advances in Cryptology[C]. 1999.388-397.
  • 5ITOH K, IZU T, TAKENAKA M. Address-bit differential power analysis of cryptographic schemes OK-ECDH and OK-ECDSA[A]. CHES 2002[C]. 2003. 129-143.
  • 6ITOH K, IZU T, TAKENAKA M. A Practical Countermeasure against address-bit differential power analysis C D[A]. CHES 2003[C]. 2003.382-396.
  • 7CORSONELLO P. An Integrated Countermeasure against Differential Power Analysis for Secure Smart-Cards[M]. The Circuit is Under Patenting. US Provisional Patent Application 60/643, 165.
  • 8RATANPAL G B, WILLIAMS R D, BLALOCK T N. An on-chip signal suppression countermeasure to power analysis attacks[J]. IEEE Transac tions on Dependable and Secure Computing, 2004, 1(3): 179.
  • 9MESSERGES T S. Securing the AES finalists against power analysis attacks[A]. Proceedings of Fast Software Encryption Workshop 2000[C]. 2000.150-164.
  • 10GEBOTYS C H. A Table masking countermeasure for low-energy secure embedded systems[J]. IEEE Transactions on Very Large Scale Intergration (VLSI) systems, 2006, 14(7): 740-753.

二级参考文献10

  • 1韩军,曾晓洋,汤庭鳌.RSA密码算法的功耗轨迹分析及其防御措施[J].计算机学报,2006,29(4):590-596. 被引量:19
  • 2赵彦光,白国强,陈弘毅,刘鸣.ECC专用密码芯片的功耗分析研究[J].计算机工程与应用,2006,42(16):25-28. 被引量:3
  • 3童元满,戴葵,陆洪毅,王志英.基于细粒度任务调度的防功耗分析模幂方法[J].计算机工程,2006,32(24):15-16. 被引量:5
  • 4童元满,王志英,戴葵,陆洪毅.一种基于随机混合坐标表示的防功耗分析标量乘法实现方法[J].小型微型计算机系统,2007,28(1):159-165. 被引量:3
  • 5KOCHER P, JAFFE J, JUN B. Differential power analysis[C]//Advances in Cryptology CRYPTO'99. Berlin Heidelberg: Springer-Verlag, 1999: 388-397.
  • 6GOUBIN L. A refined power-analysis attack on elliptic curve cyptosystems[C]//Public Key Cryptography 2003. Berlin Heidelberg: Springer-Verlag, 2003: 199-211.
  • 7ITOH K, IZU T, TAKENAK M. A practical countermeasure against address-b difference power analysis[C]//CHES 2003. Berlin Heidelberg: Springer- Verlag, 2003: 382-396.
  • 8GEBOTYS C H. A table masking counter-measures for low-energy secure embedded systems[J]. IEEE Transactions on VLSI Systems, 2006, 14(7): 740-753.
  • 9陈运 龚耀寰.基于二进制冗余数的幂剩余算法的改进.电子科技大学学报:自然科学版,2001,29(1):1-4.
  • 10MESSERGES T S, DABBISH E A, SLOAN R H. Power analysis attacks of modular exponentiation in smartcards [C]//In: Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems(CHES'99). Worcester: [s.n.], 1999: 144-157.

共引文献13

同被引文献70

  • 1饶金涛,陈运,吴震,陈俊,许森.一种抗简单功耗分析攻击的模幂算法[J].成都信息工程学院学报,2011,26(2):123-126. 被引量:2
  • 2孙敦灿,陈运,万武南,索望.功耗分析平台中混合编程的应用研究[J].成都信息工程学院学报,2011,26(2):127-131. 被引量:3
  • 3韩军,曾晓洋,汤庭鳌.RSA密码算法的功耗轨迹分析及其防御措施[J].计算机学报,2006,29(4):590-596. 被引量:19
  • 4韩军,曾晓洋,汤庭鳌.基于时间随机化的密码芯片防攻击方法[J].计算机工程,2007,33(2):6-8. 被引量:8
  • 5国家商用密码管理办公室.无线局域网产品使用的SMS4密码算法[EB/OL].http//:www.oscca.gov.en/up-File 200621016423197990.pdf,2006.
  • 6KOCHER P.Timing attacks on implementations of diffie-hellman,RSA,DES,and other systems[A].Proceedings of Advances in Cryptology-CRYPTO'96[C].1996.104-113.
  • 7DHEM J F,KOEUME F,LEROUX P A,et al.A practical implementation of the timing attack[A].Proceedings of CARDIS 1998[C].1998.14-16.
  • 8MESSERGES T S,DABBISH E A,SLOAN R H.Investigations of power analysis attacks on smartcards[A].Proc USENIX Workshop Smartcard Technology[C].Chicago,Illinois,USA,1999.151-161.
  • 9KOCHER P,JAFFE J,JUN B.Differential power analysis[A].Proceedings of Advances in Cryptology-CRYPTO'99[C].1999.388-397.
  • 10ITOH K,IZU T,TAKENAKA M.Address-bit differential power analysis of cryptographic schemes OK-ECDH and OK-ECDSA[A].CHES 2002[C].2003.129-143.

引证文献13

二级引证文献49

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部