T/2分数间隔均衡器的FPGA设计与实现

Design and Implementation of T/2 Fractional Spaced Equalizer Based on FPGA

采用复数LMS算法,设计了一个适用于16QAM信号的8抽头T/2分数间隔均衡器(FSE,fractional spaced equalizer),并在FPGA中实现。整个设计在System Generator开发环境下完成,对算法硬件实现的设计要点进行了详细阐述。通过仿真结果可以看出,所设计的均衡器能够较好地完成对信道码间干扰的均衡。

In this paper, an 8-tap T/2 fractional spaced equalizer is designed by using complex LMS algorithm and implemented based on FPGA. This equalizer is suitable for 16QAM. The design is accomplished based on System Generator development environment of Xilinx. The key points of the hardware implementation are introduced. According to the results of simulation, this equalizer can equalize the ISI caused by multi-channel.