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LTE中变速率FIR滤波器的FPGA实现 被引量:3

FPGA Implementation of Fractional Rate FIR Filter in LTE
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摘要 基于ALTERA公司提供高级数字信号处理模块,对LTE通信系统的信号采样率进行变速率滤波。由于FIR滤波器存在较大的群时延和硬件时延,信号经过滤波后有可能产生分数时延,使相位发生旋转。提出了一种新的时延补偿方法,对每一级滤波器进行时延补偿。板级测试结果表明,基带信号通过该滤波器后,星座图恢复完好,EVM小于1%,且与Matlab定点仿真结果一致。 The DSP Builder Advanced Blockset from ALTERA is used to change the signal sample rate in LTE communication system. For the group delay and hardware delay of FIR filter, the fractional delay is probably produced, and thus happens the rotation of phase. A novel scheme is proposed to compensate the delay of each filter. The on-board test indicates that the constellation is perfect and the EVM is under 1% when the baseband signal passes the filter, and this result is consistent with that of fixed-point simulation with Matlab.
机构地区 上海贝尔
出处 《通信技术》 2010年第2期207-209,共3页 Communications Technology
关键词 长期演进 高级数字信号处理模块 变速率有限冲激响应滤波器 时延补偿 LTE DSP Builder Advanced Blockset fractional rate FIR filter compensation of fractional delay
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参考文献8

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