摘要
简单介绍了频率合成技术,利用Σ-Δ技术对分数频率合成器进行了研究和设计。该频率合成器主要的子单元电路包括Σ-Δ调制器、压控振荡器和环路滤波器。最后利用ADS软件对所设计的频率合成器进行了性能仿真,结果表明,本文设计的频率合成器可以满足88MHz～132MHz动态范围的高精度、高稳定度的时钟信号输出,并且通过算法能够实现88MHz～132MHz动态范围时钟信号的灵活切换。
The article firstly gives a brief account of the frequency synthesizer technology,and then conducted the research and the design to the score frequency synthesizer making the use of Sigma-Delta technology. The frequency synthesizer＇s main sub-units circuits including Σ-Δ modulator, VCO and loop filter. Finally, carried the performance simulation using the ADS software on the designed frequency synthesizer, it indicated that the frequency synthesizer designed might satisfy the 88MHz - 132MHz dynamic range of high precision and high stability of the clock signal output, and could achieved the 88MHz - 132MHz clock signal dynamic range nimbly through the algorithm.
出处
《科技信息》
2009年第31期I0029-I0031,共3页
Science & Technology Information
基金
宁夏自然科学基金资助项目(NZ0820)
宁夏大学科学研究资助项目(ZR200808)
