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基于FPGA的多路正弦波信号发生器专用芯片设计

Design of multi-channel sinewave signal generator special-purpose chip based on FPGA
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摘要 基于开源思想与SOPC技术,采用32位开源软核处理器OR1200和开源软核DDS,在FPGA上实现了频率、相位可预置并且可调的3路正弦波信号发生器专用芯片的设计。该专用芯片基于OR1200固化专用程序实现,通过UART传输控制数据,可同时控制3路正弦波的产生,其频率范围为1Hz^100MHz,步进频率为1Hz,相位范围为0°~359°。设计方案在DE2-70开发板上进行了实际验证,证明了设计的正确性和可行性。 This paper provides the project of three paths sinewave signal generator special-purpose chip based on open source idea and SOPC technology. The generator uses the 32bits open source soft IP core CPU OR1200 and open source soft IP core DDS. The frequency and phase can preset and regulate. The sinewave signal generator special-purpose chip realizes based on OR1200 curing special program, transfers the control data through UART, and controls the system to generator three paths sinewave simultaneously. The frequency range is: 1 Hz-100 MHz and stepping is I Hz, the phase range is: 0°-359°. This design implements practical verification on DE2-70 development board of Taiwan Youjing, and proves the correctness and feasibility of this design.
出处 《微型机与应用》 2010年第5期18-20,共3页 Microcomputer & Its Applications
关键词 开源 软核 0R1200 DDS 专用芯片 open source Soft IP core OR1200 direct digital synthesizer special-purpose chip
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参考文献3

  • 1KUMM M. Direct digital synthesizer IP core. pdf[EB/OL]. (2008-12-22).[2009-10-02].http://www.opencores.org/projects.
  • 2GORBAN J. UART IP core specification, pdf [EB/OL]. (2002-8-11 )[2009-10-02].http://www.opencores.org/projects.
  • 3OpenCoresOrganization.Wishbone system-on-chip(SoC) interconnection architecture for portable IP cores, pdf[EB/OL]. (2002-09-07)[2009-10-02].http://www.opencores.org/projects.

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