摘要
提出了一种应用于PWM降压型DC-DC变换器的高性能误差放大器。该误差放大器采用反馈结构,具有较大的动态范围,并可消除噪声影响,从而显著减小了DC-DC电源的纹波电压。另外,采用该误差放大器还有效地减小了电源启动时间。文中提出的误差放大器电路及PWM控制芯片的其他电路模块采用2.0μmBipolar工艺实现。仿真结果表明,误差放大器的开环和闭环增益分别为61dB和33dB,GBW为200MHz,SR为0.64V/μs。芯片测试结果表明,在输出电压为3.3V,负载电流为0.2A时,输出纹波电压的峰-峰值小于25mV。
This paper presents a high-performance error amplifier （EA） applied for a PWM buck DC-DC converter. A novel architecture with feedback is proposed for achieving a wide dynamic range and eliminating the effect of noise. As a result, the ripples in the output voltage of DC-DC converters can be greatly reduced. Furthermore, the settling time of output voltage is extremely shortened with this EA. The proposed EA with the other blocks of the PWM controller are designed and implemented by 2.0μm Bipolar process. For this EA, the simulation results show that, the open-loop and closed-loop gains are 61 dB and 33 dB, respectively, the GBW is achieved as high as 200 MHz, and the slew rate is 0.64 V/μs. The test results for whole chip show that the peak-peak amplitude of the output voltage ripples is less than 25 mV when the out- put voltage is 3.3 V and the load current is 0.2 A.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
2010年第1期129-133,共5页
Research & Progress of SSE
基金
国家863计划项目(2005AA1Z1193)
西北工业大学研究生创业种子基金项目(200861)
