基于IP复用的片上级系统的构建与验证

Establishment and Verification of an IP-Core Based System on Chip

以一款基于IP复用的片上级系统(SHU-MV07)的设计过程为具体对象,介绍了多个IP核嵌入同一个系统所遇到的问题和解决方法;不仅给出每个IP核的嵌入方案,而且给出了整个片上级系统的验证方法;对于由模拟的IP核的嵌入而带来的验证问题,提出了一种基于NanoSim的混合信号条件下的全芯片级的验证方法;采用本方法验证了数模混合系统级的芯片(SHU-MV07)的时间大大缩短,并且通过了流片一次成功,证明了本方法的有效性。

On the basis of the design of a SoC （System on Chip） -- （SHU--MV07）, in this paper, the experience of integrating three different IP Cores in a SoC is shared. The attention will be paid to the establishment of the system and the chip level mixed-- signal verification method which not only cuts down the verification time but also ensures the accuracy.