摘要
同步动态随机存储器(SDRAM)在数据存储领域得到广泛的应用。针对一项基于PCI总线的高速数据采集系统提出了一种基于FPGA的SDRAM控制器的实现方法,FPGA中采用模块化设计方法。详细介绍了SDRAM控制器的组成结构和各模块功能,重点解决了SDRAM的刷新控制和空满检测问题,并对其进行了仿真验证,给出了全页读写模式下SDRAM的仿真时序图。仿真结果表明,SDRAM控制器实现了对SDRAM的读写操作,满足器件时序要求,完成了高速数据的大容量存储。
Synchronous Dynamic Random Access Memory has been widely used for data storage.A method is proposed for implementing the SDRAM controller based on FPGA.The method targets a design of PCI-based high-speed data acquisition system and stresses on the control of refreshing and the detection of the 'empty' state or 'full' state of SDRAM.The design method of modularization is adopted in FPGA.The schematic diagrams and the functions of modules are introduced in detail.Emulator has verified this design and the timings of read and write in the full-page mode are given.The results indicate that the SDRAM controller accomplishes to read and write from/to SDRAM with proper timing,and high-speed mass data storage is achieved.
出处
《无线电工程》
2010年第4期62-64,共3页
Radio Engineering