基于DSP+CPLD的三电平脉宽调制整流器脉冲发生方法

A Novel Pulse Generating Method for Three-Level Pulse Width Modulation Rectifier Based on Combination of Digital Signal Processor With Complex Programmable Logic Device

分析三电平脉宽调制(pulse width modulation,PWM)整流器弃用中矢量的对称三区电压矢量脉宽调制策略,根据其控制脉冲的特点,提出了基于逻辑法的数字信号处理器(digital signal processor,DSP)+可编程逻辑器件(complex programmable logic device,CPLD)的脉冲发生新方法。DSP负责发送区域信息和6路基准脉冲,CPLD通过逻辑运算辅助DSP产生三电平整流器所需的12路控制脉冲。实验结果表明,该方法正确,且占用CPLD芯片资源少,方法简单、实用;整流器工作稳定,功率因数高,直流侧中点电位平衡特性好。

The pulse width modulation （PWM） strategy using symmetrical three-section voltage vectors for three-level PWM rectifier, in which the medium vectors are abandoned, is analyzed. According to the characteristic of its control pulse, a logical approach based novel pulse generation method, in which the combination of digital signal processor （DSP） with complex programmable logic device （CPLD） is utilized, is proposed. The DSP undertakes the task of sending out regional ~nformation and 6-channel basic pulses and by means of logical operation the CPLD assists DSP to generate 12-channel control pulses needed by three-level rectifier. Experimental results show that the proposed method is correct, simple and practicable as well as it employs less source of CPLD chip. The rectifier can work steadily and it is of higher power factor, besides, the neutral-point potential at DC side possesses good balancing property.