高速数据采集系统中触发点同步技术研究

Research on the trigger point synchronizing technology of ultra-high-speed data acquisition system

在高速数据采集系统中,并行时间交替采样会引起触发抖动,导致系统整体性能的下降。本文首先分析了触发抖动出现的原因,接着提出了一种基于FPGA硬件,利用时间扩展电路的触发点同步技术来降低触发抖动,最后进行了误差分析,并给出了采用该技术的实验结果。结果表明,触发点同步技术可以有效的降低触发抖动,同时相比较以往的软件查询算法,可以并行于采集过程完成触发点同步,因此不需要耗费额外的时间,并且也不会影响系统的整机性能。

In ultra-high-speed data acquisition system,parallel time-interleaved acquisition will bring about trigger jitter,resulting in the drop of the overall system performance.This paper firstly analyzes the causes of trigger jitter occurs,then presents a technology of trigger point synchronizing which is based on FPGA and uses time expanding circuit to reduce trigger jitter,and finally,does error analysis and exposes the experimental results of adopting this technology.The results show that trigger point synchronizing can reduce trigger jitter efficiently,meanwhile,compare to the former searching algorithm of software,it can accomplish synchronizing the trigger point parallel with the acquisition process,so it needs no more extra time,nor affects the overall system performance.