摘要
为磁滞电流控制的DC-DC开关稳压器设计了一种新型的极限电流检测器。该电路不借助于专门的电流检测电路,只使用一个检测MOSFET和一个电压比较器来实现极限电流检测,减小了电路的复杂度。针对电流检测器的要求,设计了一种低电源电压、高共模电压的比较器。使用TSMC 0.18μm CMOS混合信号工艺,对电路进行设计。结果表明,电路具有很好的容差特性,并且电路可工作在1.2 V的低电源电压下。
A novel current limit detector was designed for DC-DC switching voltage regulators. In this circuit, limit current was detected only by using a sensing MOSFET and a voltage comparator, which reduced the circuit complexity. A comparator featuring low power supply voltage and high common-mode voltage was designed to meet the requirements of the current-limited detector. The circuit was designed in TSMC＇s 0. 18μm CMOS mixed-signal technology. It has been demonstrated that the circuit operates properly at 1.2 V supply voltage and it has a good tolerance.
出处
《微电子学》
CAS
CSCD
北大核心
2010年第2期222-225,共4页
Microelectronics
基金
国家自然科学基金-中物院联合基金资助项目(10876029)
