基于DSP的FPGA动态重构系统研究与设计

Dynamically reconfigurable system of FPGA based on DSP

为了提高现场可编程门阵列(FPGA)的资源利用率,在介绍FPGA重构技术的原理和分类的基础上,讨论了Virtex-4系列FPGA的配置原理和动态重构的方法,并设计出数字信号处理器(DSP)配置FPGA的硬件方案来实现可重构系统。FPGA采用SelectMAP配置方式,实现配置逻辑的快速重构和局部动态重构,最后根据Virtex-4的配置流程和时序关系,给出了可重构系统配置的软件流程。经实验测试,该系统稳定可靠,可在1s内完成5Mbyte配置程序的动态重构。

To improve FPGA resource utilization，this study introduced fundamental and classification about dynamically reconfigurable FPGA at first, then the Virtex-4 FPGA configuration theory and two kinds of reconfiguration method were discussed, the hardware design of configuring FPGA with Digital Signal Processor（DSP） was proposed to implement the reconfiguration system．DSP was used to configure and reconfigure this FPGA in a SelectMAP configuration mode. The system could be configured fast and reconfigured partially. Finally the program flow chart of the dynamically reconfigurable system was presented according to procedure and time sequence relation. The experiment results indicated that the system was stable and could reconfigure FPGA with 5 Mbyte/s.