摘要
为保证数据包在现场可编程门阵列器件之间可靠传输,提出一种有效带宽达12.8GBits/s的高速整包数据传输接口(complete packet interface,CPI),采用out_of_band方式传输控制信息,使控制字传输不占用报文内容的传输带宽,提高了该接口的带宽利用率。利用动态相位调整技术,并在相邻包间隔插入固定的校验序列,通过设定简单的判定规则,实时感知当前接口的通道状态并及时消除相位偏移,从而保证接收端可靠接收数据。
To ensure reliable transmission of packets between devices such as FPGAs, a new higher-speed complete packet interface is designed which supports 12.8 G Bits/s available bandwidth. The control information is transmitted by out-of-band mode, which not occupies packet bandwidth and increases the bandwidth utilization ratio of interface. With dynamic phase adjusting and inserting checkout sequence between two adjacent packets, the receiver monitors channel status continuously with judgment formula, and eliminates bus phase skew in time. The receiver can ensure receiving packet accurately.
出处
《计算机工程与设计》
CSCD
北大核心
2010年第8期1835-1838,共4页
Computer Engineering and Design
基金
国家863高技术研究发展计划基金项目(2008AA01A323)
关键词
现场可编程门阵列
整包传输接口
校验序列
链路状态
相位偏移
field programmable gate arrays
complete packet interface
checkout sequence
channels status
phase excursion
