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一种可重构处理器的编译器的设计与实现 被引量:1

Design and implementation of the compiler of a reconfigurable processor
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摘要 在现有可重构处理器ESL模型的基础上,提出了为可重构处理器设计一个编译器—CoRP(Compiler of Reconfigurable Processor)。CoRP以带有编译指示的串行C代码作为输入,并以并行计算的可重构处理器的机器码作为输出。可重构处理器有了CoRP的支持后,可以自动针对带有编译指示的不同应用程序完成对可重构阵列的重构工作。对数字信号处理应用的仿真结果显示,经过CoRP翻译的代码的性能十分接近于需要花费大量精力手动配置的最理想代码的性能。 This paper describes an compiler—CoRP for a reconfigurable processor in base of an existent reconfigurable processor. CoRP works with the input of serial C code with directive and the output of parallel machine code which is fit for the reconfigurable processor. With the help of CoRP,the reconfigurable processor can finish the reconfiguration automatically according to various application described with C and compiling directive. The simulation results about DSP show that the performance of the code compiled by CoRP is close to the one of the optimal code translated manually.
出处 《信息技术》 2010年第4期59-62,66,共5页 Information Technology
关键词 编译器 可重构处理器 数字信号处理 编译指示 并行计算 compiler reconfigurable processor digital signal processing compilition directive parallel computing
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参考文献4

  • 1朱文.GRCC:一种通用可重构协处理器[M].2008.
  • 2Hartej Singh,Ming-Hau Lee,Guangming Lu,et al.MorphoSys:An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive Applications[J]IEEE Transaction On Computers,May 2000,49(5).
  • 3Alfred V aho,Ravi Sethi,Jeffrey D Ullman.Compilers:Principles,Techniques,and Tools[Z].Bell Telephone Laboratories,1986.
  • 4Hartej Singh,Fadi J Kurdahi,Nader Bagherzadeh,et al.Reconfigurable Architectures for Multimedia and Data-Parallel Application Domains Dissertation[M].University of California,Irvine,2000.

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