摘要
Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors （p-MOSFETs） with hafnium silicon oxynitride （HfSiON） gate dielectric and tantalum nitride （TAN） metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance-voltage curve hysteresis of Ge metal-oxide-semiconductor （MOS） capacitors may be caused by charge trapping centres in GeOx （1 〈 x 〈 2）. Effective hole mobilities of Ge and Si transistors are extracted by using a channel conductance method. The peak hole mobilities of Si and Ge transistors are 33.4 cm2/（V.s） and 81.0 cm2/（V.s）, respectively. Ge transistor has a hole mobility 2.4 times higher than that of Si control sample.
Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors （p-MOSFETs） with hafnium silicon oxynitride （HfSiON） gate dielectric and tantalum nitride （TAN） metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance-voltage curve hysteresis of Ge metal-oxide-semiconductor （MOS） capacitors may be caused by charge trapping centres in GeOx （1 〈 x 〈 2）. Effective hole mobilities of Ge and Si transistors are extracted by using a channel conductance method. The peak hole mobilities of Si and Ge transistors are 33.4 cm2/（V.s） and 81.0 cm2/（V.s）, respectively. Ge transistor has a hole mobility 2.4 times higher than that of Si control sample.
基金
Project supported by the National Basic Research Program of China (Grant No. 2006CB302704)
