ADF4157在数字预失真时钟方案中的应用

ADF4157 Applications in Digital Pre-Distortion Clock Scheme

在功放数字预失真系统中,对其上下变频的本振时钟有着很高的要求,为此设计一种新的并结合ADF4157的数字预失真时钟方案。本文介绍了时钟方案的整体硬件架构设计以及ADF4157芯片主要寄存器配置,ADF4157的相位噪声和锁定时间通过ADIs-imPLL仿真且分析其结果。对基于此时钟方案制作出来的PCB板仔细调试之后,ADF4157输出的本振频率达到设计要求。

In Digital pre-distortion power amplifier system,which has a very high demand to the local oscillator clock of the upper and lower frequency.A new clock scheme which combined with ADF4157 for digital pre-distortion system.The main registers＇ configuration of ADF4157 and the whole hardware architecture of the clock scheme are introduced in paper.Phase noise and lock time of ADF4157 were simulated by ADIsimPLLand analyzed simulation results.After the PCB board of the clock scheme be made,we debugged carefully to all parts of the PCB,output local oscillator frequency of ADF4157 can meet design requirements.