基于FPGA的K9F4G08 Flash控制器设计

Design of K9F4G08 Flash controller based on FPGA

设计了一种能使FPGA的主状态机直接管理Flash的控制器,该控制器具有自己的指令集和中断管理方式。用户可以根据FPGA的系统时钟对控制器进行操作,无需关心Flash对指令和数据的时序要求。控制器建立了自己的坏块管理机制,合并了一些Flash的常用关联指令,方便了用户对FPGA主状态机的设计。

This paper designs a Flash controller, which enables the FPGA main state-machine to manage a Flash memory chip efficiently. The controller builds its own instruction set derived from the construction set of Flash, as well as a simple interrupt mechanism. User operates the controller with the system clock of FPGA without caring about the timing sequences required by the Flash. The proposed Flash controller develops its own method for the reorganization and mapping of invalid blocks in a Flash chip. Some of the constructions in the original construction set of the Flash are combined and enhanced to help the users coding their HDL with a more compact style.