数字示波器中峰值检测电路的设计与仿真

The Design and Simulation of Peak Detection Circuit in Digital Oscilloscope

数字示波器中峰值检测电路的设计采用全数字化,并在FPGA中实现。其设计思路是:把经过AD转换后的数据锁存到锁存器中,再与最大、最小值寄存器其的数据进行比较,平滑,然后把每轮采样到的数据按照一定的顺序保存到FIFO存储器。最后数据会按一定顺序从FIFO中读取出来,送往显示设备进行显示。

Peak detection circuit of digital oscilloscope is designed with the digital technology and is implemented by using the FPGA. The data converted by AD are latched to the latch, and then compared with the data in maximum, minimum register. Finally, the smooth function is realized.The data of sampling are stored to the FIFO in order, then the data are read out from the FIFO according to a certain order and sent to the display.