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一种可变分辨率ADC结构

A Variable Resolution ADC Structure
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摘要 高速快闪式ADC(Flash ADC)采用全并行结构,具有很高的模数转换速率,但分辨率较低。本文将dither(抖动)技术与高速快闪式ADC结合,提出一种可变分辨率ADC结构,能够在信号频率较低时,将高速ADC的速度转化为量化精度,提高ADC量化分辨率。本文首先对dither技术提高快闪式ADC分辨率的原理做出了理论分析,给出了可变分辨率的ADC系统结构,并Matlab环境下对这种结构进行了仿真验证。 High speed flash ADC applies the full Parallel Design,having very high speed for analog to digital conversion,but lowresolution.The paper develops a variable resolution ADC structure by combining the dither and high speed ADC,which can increase the ADC’s resolution when the input signal is a low frequency one,converting the ADC’s high speed character to resolution precision one.First,the paper makes an analysis of the theory,which is to increase the resolution of ADC by dither,and develops the structure of the variable resolution ADC,last validates the structure by simulated in Matlab.
出处 《电测与仪表》 北大核心 2010年第4期78-80,共3页 Electrical Measurement & Instrumentation
基金 国家863目标导向资助项目(2009AA01Z259)
关键词 高速ADC DITHER 量化精度 可变分辨率 high speed flash ADC dither resolution quantification precision variable resolution
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参考文献6

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  • 2Yun-Shiang Shu,Bang-Sup Song.A 15-bit Linear 20-MS/s Pipelined ADC Digitally Calibrated with Signal-Dependent Dithering[J].IEEE JOURNAL OF SOLID-STATE CIRCUITS,2008,43(2):342-350.
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