摘要
CCSDS图像数据压缩标准中采用9/7整形离散小波变换为核心算法,该算法结构简单,易于硬件设计实现。文中基于FPGA设计实现了9/7整数离散小波变换系统,设计中使用内部RAM存储方式,减小了对存储器的需求量,同时采用基于行的列变换方式,行、列变换同时进行,提高了运行速度,仿真和综合结果显示该设计需要的硬件资源少,运行速度快。
The CCSDS Image Data Compression standard uses 9/7 integer lifting wavelet transform as the core algorithm, which is simple and easy in hardware design and implementation. This paper designs and implements a 9/7 integer lifting wavelet transform system based on FPGA with internal RAM memory to reduce the demand for storage, and with the line-based column transform method, by which the row transform and column transform are done simultaneously, thereby increasing the speed. Simulation and synthesis results show that the design requires less hardware resources and runs faster.
出处
《电子科技》
2010年第5期4-6,共3页
Electronic Science and Technology
