摘要
为了提高工作效率,节省系统资源,解决I/O引脚不足问题,提出了一种基于FPGA的多路异步串行数据接入和复用的设计。该设计使用VHDL硬件描述语言,对UART接收和发送模块、时分复用模块在Xilinx ISE环境下进行设计与仿真,实现了将8路RS232信号转换为1路LVDS信号的功能,使其可以接入图像处理硬件平台进行处理。
To improve working efficiency,save system resources and solve the inadequacy of I/O pins,the paper proposes a design of multi-channel asynchronous serial data access and multiplexing based on FPGA,which uses VHDL hardware descriptive language,designs and simulates UART receiving and transmitting modules,TDM modules in the Xilinx ISE environment,realizing the conversion of eight RS232 signals to one LVDS signal,which may be processed in the picture processing hardware platform.
出处
《山西科技》
2010年第3期59-60,63,共3页
Shanxi Science and Technology