基于FPGA的LZW数据压缩算法实现

LZW Data Compression Algorithm Realization Based On FPGA

压缩编码不仅可以去除大量原始数据中的干扰信号、噪声信号,增强获取信号的准确性,同时也能尽可能地压缩文件,使其便于存储和传输。数据压缩技术还广泛应用于工业、农业、国防、军事等各个领域。因此,数据压缩的研究具有非常重要的意义。本文在介绍LZW压缩算法的基础上,探讨了LZW算法在数据压缩系统中的应用及其可行性,给出了LZW算法的基本思想及算法实现,并重点研究了采用VHDL语言来实现LZW算法压缩,其程序已通过仿真验证与综合。通过分析FPGA实现硬件压缩电路的可行性,利用FPGA芯片内的RAM来存储LZW算法的字典,硬件电路采用的是XILINX公司生产的Spartan-IIE系列的XC2S50E芯片,并完成的电路原理图及PCB板的设计。

The compression coding not only may remove in the massive primary data the unwanted signal, the noise signal, enhance the accuracy of signal acquisition, simultaneously also compress files as much as possible, cause it to be advantageous for the memory and the transmission. The data compression technology also widely applies in the industry, the agriculture, the national defense, the military and other fields. Therefore, data compression research has the very vital significance. On the basis of the LZW compression algorithm, the article discussed the applicability and feasibility of the LZW algorithm in the data compression system, has given the basic philosophy and implementation of algorithm, and focus on the use of the VHDL language to achieve the LZW algorithm compression, and its procedure already through simulation confirmation and synthesis. Through analyzing the feasibility of FPGA to realize the hardware compressor circuit, uses RAM in FPGA chip to save the LZW algorithm, what the hardware circuit uses is XILINX Corporation produces Spartan - liE the series XC2S50E chip, and completes the electric schematic diagram and the design of PCB board.