1.5Bit Flash结构模数转换单元电路研究

Research of the 1.5Bit Flash ADC unit circuit

本文采用CMOS工艺设计了一种动态比较器,并由此构成Flash结构模数转换器单元电路,在各种模数转换器中,由于Flash结构在保持较低功耗的同时,能够缩短AD转换的时间,是比较优化的选择。比较器采用开关电容全差分动态结构,可以有效的减小失调电压。在本文中使用HSPICE对设计的电路进行了仿真验证,仿真结果显示本电路可以在100MHz的时钟频率下对20MHz的输入信号进行转换处理。

This paper completes the design of a dynamic comparator and a Flash ADC unit circuit with CMOS technology. In all kinds of ADC, since the structure of the Flash can maintains low power consumption, and reduce the time of AD conversion at the same time, is a more optimal choice. With a switched-capacitor dynamic structure of whole difference, the comparator can effectively reduce the voltage imbalance. In this paper, the ADC unit circuit is simulated and verified with HSPICE. This circuit can process 20MHz analog signal under IOOMHz clock signal.