期刊文献+

“龙腾R”微处理器分支处理单元的研究与设计 被引量:2

Research and Design of Branch Process Unit in "Longtium R" Microprocessor
下载PDF
导出
摘要 "龙腾R"是西北工业大学自主研制的32位高性能微处理器.该处理器的分支处理单元(BPU)能有效降低控制相关带来的延迟.通过分析已有的分支方向预测算法和分支目标地址预测策略,在分支处理单元总体约束下,合理分配分支方向预测和目标地址预测的实现代价,提出了一种基于混合分支预测器和经过改进的目标地址缓冲(BTB)结构的分支处理单元结构.该结构不仅比传统的由gshare分支方向预测器构成的分支处理单元预测准确率平均高出1%~2%,并具有面积小、功耗低的特点. "Longtium R" is a 32-bit high performance microprocessor developed by Northwestern Polytechnical University.Branch process unit(BPU)of the processor can remarkably reduce the latency caused by control hazard.Through analyzing some algorithms of branch direction predict and some strategies of branch target address predict,under the overall constraints of BPU,appropriately allocating the hardware cost,this paper proposes a new structure of branch process unit,based on a combined branch predictor and improved branch target buffer(BTB).Comparing to the traditional BPU which is comprised of gshare branch predictor,this one increases prediction accuracy by 1%~2%,with characteristics of small area and low power consumption.
出处 《微电子学与计算机》 CSCD 北大核心 2010年第6期122-127,共6页 Microelectronics & Computer
基金 国家自然科学基金项目(60773223 60736012)
关键词 分支预测 分支处理 混合分支预测器 目标地址缓冲 branch prediction branch process combined branch predictor branch target buffer
  • 相关文献

参考文献7

  • 1Snith J E.A study of branch prediction strategies[C]//Minneapolis:Proceedings of the 8th Annual International Symposium on Computer Architecture.Widdy,1981:135-148.
  • 2Yeh T,Patt Y.Two-levd adaptive branch prediction[C]//Proceedings of the 24th Annual ACM/IEEE International Symposium and Workshop on Microarchitecture.USA:Ann Arbor,1991:51-61.
  • 3Scott M,McFaring.Combining branch predictors[R].California,Technical Report TN-36,Digital Western Research Laboratory,1993.
  • 4Perleherg C,Smith A J.Branch target buffer design and optimization[J].IEEE Transactions on Computers,1993(23):396-412.
  • 5Brian K Bray,Flynn M J.Strategies for branch target buffers[M].New York:ACM,1991.
  • 6汪永威,樊晓桠,黄小平.32位RISC微处理器中分支预测器的硬件实现[J].计算机应用研究,2009,26(2):419-421. 被引量:3
  • 7武萌,沈海斌.一种gshare分支预测器的低功耗设计方法[J].微电子学与计算机,2007,24(3):200-202. 被引量:7

二级参考文献9

  • 1刘岩,侯朝焕.一种静态可控功耗的数据Cache设计[J].微电子学与计算机,2004,21(11):135-137. 被引量:4
  • 2武萌,沈海斌.一种gshare分支预测器的低功耗设计方法[J].微电子学与计算机,2007,24(3):200-202. 被引量:7
  • 3Smith J E.A study of branch prediction strategies.In Proc.the 8th Int.Symp.Computer Architecture,Minneapolis,1981,135~148
  • 4Yeh T Y,Patt Y N.Alternative implementations of twolevel adaptive branch prediction.In Proc.the 19th Int.Symp.Computer Architecture,Queensland,1992,124~134
  • 5Scott McFarling.Combining branch predictors.Technical Report TN-36.Digital Western Research Laboratory,June 1993
  • 6Yeh T Y,Patt Y N.Two-level adaptive training branch prediction.In Proc.the 24th Annual Int.Symp.Microarchitecture,Albuquerque,1991,51~61
  • 7Chang P Y,Hao E,Patt Y N.Alternative implementations of hybrid branch predictors.In Proc.the 28th Annual Int.Symp.Microarchitecture,Ann Arbor,1995,252~257
  • 8Matthew R Guthaus,Jeffrey S Ringenberg,Dan Ernst.MiBench:a free,commercially representative embedded benchmark suite.In IEEE 4th Annual Workshop on Workload Characterization,Austin,2001,1~12
  • 9Dongrui Fan,Hongbo Yang,Guangrong Gao,Rongcai Zhao.Evaluation and choice of various branch predictors for low-power embedded processor.Journal of Computer Science and Technology,2003,18(6),833 ~838

共引文献8

同被引文献24

  • 1胡伟武,张福新,李祖松.龙芯2号处理器设计和性能分析[J].计算机研究与发展,2006,43(6):959-966. 被引量:37
  • 2Evers M, Yeh TY. Understanding branches and designing branch predictors for high-performance micro- processors[J]. Proceedings of the IEEE, 2001, 89 (11) : 1610-1620.
  • 3Perleberg C, Smith A. Branch target buffer design and optimization [J]. IEEE Transactions on Computers, 1993, 42(4): 396-412.
  • 4Scott McFarling. Combining branch predictors[R]. California: Digital Western Research Laboratory, 1993.
  • 5Yeh T Y, Patt Y N. Alternative implementations of two- level adaptive branch prediction [C] //Proc of the 19th Annual Int Symp on Computer Architecture (ISCA'92). New York: ACM, 1992:124-134.
  • 6Seznec A. The L TAGE branch predictor [OL]. [2012-02- 16]. http://www, jilp. org/vol9/v9paper6, pdf.
  • 7Srinivasam R, Frachtenberg E, Lubeck O, et al. An idealistic Neuro-PPM branch predictor [OL]. [2012-02-16]. http ://www. jilp. org/volg/v9paperS, pdf.
  • 83imenez D A, Keckler S W, Lin C. The impact of delay on the design of branch predictors [C] //Proc of the 33rd Annual ACM]IEEE Int Syrup on Microarchitecture (MICRO 33). New York: ACM, 2000:67-76.
  • 9Burcea I, Moshovos A. Phantom-BTB: A virtualized branch target buffer design [C] //Proc of the 14th Int Conf on Architectural Support for Programming Languages and Operating Systems (ASPLOS'09). New York: ACM, 2009: 313-324.
  • 10Jimenez D A. Reconsidering complex branch predictors [C] //Proc of the 9th Int Syrup on High Performance Computer Architecture ( HPCA'03 ). Los Alamitos, CA.- IEEE Computer Society, 2003:43-52.

引证文献2

二级引证文献3

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部