CMOS集成电路静态功耗电流测试的重要性研究

Importance and Methodology Study of Static Power Current Testing for CMOS ICs

目前,国内生产厂和用户针对CMOS集成电路静态电流的测试,仍基于现有的标准和产品规范。但是,采用这些测试方法来测试合格的器件,在使用过程中却发现了某些电路静态电流超差的现象。通过比较目前国内外的标准和规范所规定的方法,分析其存在的问题,并说明了静态电流测试的重要性。通过实验进行了验证说明,并提出了解决问题的建议。

It is the fact that both manufacturers and users test the quiescent current of CMOS ICs only based on the currently active standards. But it is found that some devices that had passed the test have the quiescent current exceeding the design limits. This problem is analyzed through the comparison of the test methods specified in the national and international standards with emphasis on the importance of the quiescent current test. A solution to the problem is proposed base on the experimental demonstration to the problem.