对具有结终端保护的4H-SiC肖特基势垒二极管的研究

Study on 4H-SiC schottky barrier diode with juntion termination techniques

在对4H—SiC高压肖特基势垒二极管进行了理论分析的基础上,利用仿真软件ISE10.0对具有结终端保护的4H—SiC高压肖特基势垒二极管耐压特性进行了模拟仿真计算,并取得了很多有价值的计算结果。利用平面制造工艺,结合仿真提取的参数,试制了4H—SiC肖特基势垒二极管。实验测试结果表明,仿真计算的结果与实际样品测试的数据一致性较好,实测器件反向耐压值已达到1 800 V。

In this paper,the 4H-SiC high voltage schottky barrier diodes（SBD） reverse characterization with junction termination technique are simulated using a device simulator ISE10.0 on the basis of the theoretical analysis for 4H-SiC high voltage SBD,and a lot of valuable results are obtained.4H-SiC SBD with junction termination technique was fabricated according to the simulation analytical parameters by use of planar process.The applied results show that the a good consistency between simulation and experimental data are achieved.The results show that the 4H-SiC SBD with optimized JTE edge termination can accomplish near ideal breakdown voltage of 1800V.