FED下基板制作工艺及介质的耐压特性研究

Fabrication and Voltage Properties of the FED Bottom Substrate

在制作场发射显示器(FED)下基板的工艺过程中,设计了两种方案来制作下基板的阴栅极,用扫描电镜观察所得样品的横截面,并计算出各结构尺寸,分析阴栅极易形成短路的原因。优选出其中一种方案作为介质耐压试验的工艺方法,测试介质在中性溶液中浸泡不同时间后的耐压曲线,并分析击穿电压降低的原因。

Two plans were designed to fabricate the cathode and grid electrode in the process of fabricating the FED bottom substrate. The cross section of sample was observed by SEM and the size of architectures was calculated. The event of short circuit and explanations were discussed based on the experimental data. One better method was involved in the voltage prosperity experiment. The voltage curve was measured and the drop of breakdown voltage was discussed.