摘要
为了满足雷达系统对信息加密传输的要求,对高级加密标准(AES)的计数模式(CTR)重新设计,将其改进成流加密的工作模式。通过进行结构折叠和算法重用,有效地减小了资源占用,提高了吞吐率。在Spartan3型号的FPGA上,仅占用728个slice就可以实现276.53Mbps的吞吐率。本设计实现了节省硬件资源的纯逻辑模式和速度较高的分布式内存模式,并且完成实时密钥调度和流水线设计,获得了高可靠性、高吞吐率和高安全性。通过对实际雷达数据的加密实验,验证了该设计的有效性,显示了流加密模式的AES在雷达系统加密传输中的强大潜力。
In order to satisfy the encryption requirements of radar system data transfer,the Counter （CTR） mode of Advanced Encryption Standard（AES） was modified into a stream cipher.Through structure folding and module reuse,the resource utilization was reduced and the throughput was increased.In Spartan3 FPGA,276.53 Mbps throughput could be achieved only by using 728 slices.The resource-saving pure logic mode and high-speed distributed memory mode were implemented in the design.On-the-fly key scheduling and pipeline were also performed,which led to high throughput and security level.The real-life test showed the design had satisfied the requirements of radar signal encryption,which revealed a great potential of stream mode AES in radar signal transmission.
出处
《信息与电子工程》
2010年第3期276-280,共5页
information and electronic engineering
