摘要
介绍了BESⅢ触发系统高精度事例时刻标定插件的设计与实现,该插件可对触发系统产生的好事例判选信号L1*打上精确的时间标签。插件采用GPS授时方案;支持VME总线读写操作及CBLT在线数据读出;所有逻辑功能在FPGA中实现。最后给出了时间标签信息的输出结果,插件的设计达到了预期的设计目标。
It introduces about the design and implementation of High Precise Event Time Stamping module, which is responsible for stamping the good event pass signal L1 * ,generated by trigger system. The module is based on GPS timing solution, supported the VME typical read/write cycles and protocol like CBLT for data transferl all functions are implemented in FPGA. Time Stamping data output is given at the end of the paper. The design achieves the preliminary design object.
出处
《核电子学与探测技术》
CAS
CSCD
北大核心
2010年第5期592-596,605,共6页
Nuclear Electronics & Detection Technology