高速四元探测器峰值保持电路的设计

Design of Peak-hold Circuit for High Speed Quaternion Detector

针对高速四元探测器输出脉宽窄、后续电路不能响应的问题,提出了高速四元探测器峰值保持电路。电路包括自动调节增益跨阻放大器、峰值检测电路和四元采样保持电路。根据高速脉冲保持的要求,分析了各个子电路的原理,设计了详细的电路图。实验表明,电路能适应探测器大范围的变化,可适应于不同的背景噪声,输出电压波形稳定,易于后续电路处理。峰值保持电路设计合理、结构简单,具有很强的实用性。

Focused on the problem of narrow output pulse width of high speed quaternion detector and the follow-up circuit can not respond to it, the peak-hold circuit of high speed quaternion detector was presented. The circuit includes automatic gain control trans-impedance amplifier, peak detection circuit, sample-and-hold circuit. According to the requirements of high-speed pulse hold- ing. the principles of sub-circuits were analyzed and detailed circuit diagram was designed. The experimental results show that the circuit can adapt to detector changing in large-scale and different background noise, output voltage waveform was stable for the follow-up circuits. The circuit is reasonably designed, simple structured, which has great practical significance.