改进的截断乘法器及其在快速傅里叶变换中的应用

A New Area Efficient Multiplier and Its Application in Fast Fourier Transform

针对截断乘法器在进行补码运算时有较大的误差，提出了一种改进算法，即将乘数、被乘数均左移一至二位，经截断乘法器运算得到的乘积再右移相应的位数，则能有效减小误差，且误差小于标准乘法器采用截断运算时的误差，而面积约为标准乘法器面积的７０％。同时讨论了该算法在硬件ＦＦＴ中的应用，当输入信号分别是纯正弦信号和白噪声中的正弦信号情况时，仿真结果证明能够得到正确的幅谱。

A new algorithm is presented to solve the large error of truncated multipliers for two′s complement.In this algorithm,the multiplier and multiplicand are shifted by 1 or 2 bits to the left before operation,and the resultant product is then shifted by corresponding bits to the right.By using this algorithm,the error is smaller than that of a standard multiplier for truncated operation,while it only requires about 70% of the area of a standard multiplier.Application of the new truncated multiplier to the hardware implementation of fast Fourier transform(FFT)is also discussed.Results from simulation demonstrate that a proper spectrum of signals can be obtained,when the input is a pure sine signal or the sine signal in white worse.